Multichip device and method for producing a multichip device

ABSTRACT

Multichip devices and methods of making the same. In one embodiment, a chip stack is sandwiched between first and second redistribution substrates. The chip stack is electrically connected to contact structures of the first redistribution substrate and the second redistribution substrate.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a multichip device including a chipstack and a method for producing such a multichip device.

2. Description of the Related Art

Package stacks wherein a number of separately packaged devices arestacked onto each other to reduce the overall size of a systemintegrated device are well known. A conventional package comprises asubstrate and a die placed on the substrate wherein solder balls whichare in electrical contact with the die are arranged surrounding the diearea on the substrate. Such a package can be mounted on another one ofsuch packages while the die of the respective other package is arrangedin the die area. The overall size is affected as a larger size of thesingle packages due to the bigger foot print area compared to a normalCSP (chip stack package) is needed. Furthermore, the areas exceeding thedie area of the substrate are susceptible to warpage and therefore thetotal I/0 count is limited.

To improve the package size, a fold stack was developed by using a flextape. The flex tape connects the solder balls of one package device withthe solder balls of another package device which are stacked onto eachother wherein the flex tape is folded around the package devices whichrequires additional assembly processes and increases the size of thepackage stack due to the dimensions of the flex tape.

An alternative possibility is to place an interposer on the active dieof one package device to allow the assembly of another package on it.The interposer, however, has to be connected to the package substratevia bond wires and requires a window molding process, i.e. requires awindow such that the contact pads on the interposer can be externallycontacted.

There is a need of easy to use and easy to produce package stack devicesto provide multi-chip devices having a high performance systemintegration.

SUMMARY OF THE INVENTION

One or more advantages of the present invention are described below withregard to different aspects and embodiments of the present invention.

According to a first aspect, a multichip device is provided whichcomprises a first and a second redistribution substrate each having oneor more of first contact structures on a first surface and one or moreof second contact structures on a second surface wherein the first andthe second contact structures are electrically interconnected in apredetermined manner. Furthermore, a chip stack having a plurality ofstacked chips is provided wherein a first outer chip and a second outerchip are arranged to form opposing outer surfaces of the chip stack. Thefirst outer chip is electrically connected to the second contactstructure of the first redistribution substrate and the second outerchip is electrically connected to the second contact structure of thesecond redistribution substrate.

At least one of the first and second outer chips of the chip stack mayhave on its surface forming one of the outer surfaces of the chip stackone or more contact elevations which are in electrical contact to therespective second contact structures of at least one of the first andsecond redistribution substrates.

Additionally, at least one of the chips of the chip stack has one ormore third contact structures on a surface portion uncovered by anadjacent one of the chips of this chip stack wherein the third contactstructures are electrically connected with the second contact structuresof at least one of the first and the second redistribution substrates bymeans of one or more respective bond wires.

According to a further aspect, a multichip device is provided whichcomprises a first and a second redistribution substrate each having oneor more of first contact structures on a first surface and one or moreof second contact structures on a second surface wherein the first andthe second contact structures are electrically interconnected in apredetermined manner. The multichip device further comprises a chipstack sandwiched between the first and second redistribution substratesand having a plurality of stack chips wherein the first outer chip and asecond outer chip are arranged to form opposing outer surfaces of thechip stack wherein the second surfaces of the first and the secondredistribution substrates opposing each other. The first outer chip iselectrically connected to the second contact structures of the firstredistribution substrate and the second outer chip is electricallyconnected to the second contact structure of the second redistributionsubstrate. The one or more first contact structures on the first surfaceof one of the first and the second redistribution substrates compriseone or more outer contact elevations wherein the first surface of therespective other of the first and second redistribution substrate areformed as contact pads.

According to a further aspect, a multichip device is provided. Themultichip device comprises a first and a second redistribution substrateeach having one or more of first contact structures on a first surfaceand one or more of second contact structures on a second surface whereinthe first and the second contact structures are electricallyinterconnected in a predetermined manner. A chip stack is sandwichedbefore the first and the second redistribution substrates wherein thesecond surfaces of the first and the second redistribution substratesopposing each other wherein the chip stack having a plurality of stackedchips wherein a first outer chip and a second outer chip are arranged toform opposing outer surfaces of the chip stack. The first outer chip iselectrically connected to the second contact structure of the firstredistribution substrate and the second outer chip is electricallyconnected to the second contact structure of the second redistributionsubstrate. The one or more first contact structures on at least one ofthe first surfaces of the first and the second redistribution substratesat least partially comprise one or more outer contact elevations whereinthe respective other contact structure a formed as contact pads.

According to a further aspect, a multichip device is provided. Themultichip device comprises a first and a second redistribution substrateeach having one or more first contact structures on a first surface andore or more second contact structures on a second surface wherein thefirst and the second contact structures are interconnected in apredetermined manner. A chip stack is sandwiched between the first andthe second redistribution substrates and has a plurality of chipswherein a first outer chip and a second outer chip are arranged to formopposing outer surfaces of the chip stack. The first outer chip isattached on the first redistribution substrate and the second outer chipis attached on the second redistribution substrate wherein one of thefirst and the second outer chips has on its respective surface formingthe outer surface of the chip stack one or more contact elevations whichare in electrical contact to one or more second contact structures ofthe first redistribution substrate. One of the chips of the chip stackhas one or more third contact structures on a surface portion uncoveredby an adjacent one of the chips of the chip stack wherein the thirdcontact structures are electrically contacted with the second contactstructures of the second redistribution substrate by means of a bondwire.

According to a further aspect, a multichip device is provided comprisinga first and a second redistribution substrate each having a plurality offirst contact structures on a first surface and a plurality of secondcontact structures on a second surface wherein the first and the secondcontact structures are interconnected in a predetermined manner. Aplurality of chip stacks are sandwiched between the first and the secondredistribution substrates, each having a plurality of chips. A firstouter chip and a second outer chip are arranged to form opposing outersurfaces of the respective chip stack. First one of the plurality of thechip stacks is arranged so that the first outer chip is arranged on thefirst redistribution substrate wherein the first outer chip has on itssurface forming an outer surface of the chip stack one or more contactelevations which are in electrical contact to the respective secondcontact structures of the first redistribution substrate. A second oneof the plurality of the chip stack is arranged so that the first outerchip is attached on the second redistribution substrate wherein thefirst outer chip has on its surface forming an outer surface of the chipstack one or more contact elevations which are in electrical contact tothe respective second contact structures of the second redistributionsubstrate.

According to a further aspect, an electronic device having a first and asecond printed circuit board is provided wherein one or more multichipdevices of the above mentioned type are sandwiched between the first andthe second printed circuit boards such that each of the multichipdevices is electrically connected to interconnection structures of atleast one of the first and the second printed circuit board.

According to further aspects of the present invention, package stackshaving a plurality of stack multichip devices of one of the abovementioned type are provided wherein the first contact structures of thefirst redistribution substrate of a first one of the multichip devicesare brought into contact with the second contact structures of thesecond redistribution substrate of a second one of the multichipdevices.

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above recited features of the presentinvention can be understood in detail, a more particular description ofthe invention, briefly summarized above, may be had by reference toembodiments, some of which are illustrated in the appended drawings. Itis to be noted, however, that the appended drawings illustrate onlytypical embodiments of this invention and are therefore not to beconsidered limiting of its scope, for the invention may admit to otherequally effective embodiments.

FIG. 1 shows a multichip device according to an embodiment of thepresent invention;

FIG. 2 shows a process state of an assembly process to produce amultichip device according to an embodiment of the present invention;

FIG. 3 shows a package stack having a plurality of multichip devicesstacked on each other according to a further embodiment of the presentinvention;

FIGS. 4A and 4B show a further embodiment of a multichip device and theprocess to produce such a multichip device;

FIG. 5 shows an electronic device having a plurality of multichipdevices according to a further embodiment of the present invention; and

FIG. 6 shows a multichip device having edge contacts according to afurther embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In FIG. 1, a multichip device 1 of a first embodiment is depicted. Themultichip device 1 comprises a first redistribution substrate 2 and asecond redistribution substrate 3 in between which a chip stack 4 isarranged. Each of the redistribution substrates 2, 3 is preferably madeof a nonconductive resin as commonly used for printed circuit boards(PCB) and has a first surface 5 and a second surface 6 on which firstcontact structures 7 and second contact structures 8 are formed,respectively. The first and the second redistribution substrates 2, 3are arranged to sandwich the chip stack 4 such that the first and thesecond redistribution substrates 2, 3 extend substantially in parallel,wherein its second surfaces 6 opposing each other. Each of theredistribution substrates 2, 3 may comprise a plurality ofredistribution structures 9 allowing association with one or more of thefirst contact structures 7 on the first surface of each of theredistribution substrates 2, 3 to one or more second contact structures8 on a second surface of the respective redistribution substrate 2, 3 toprovide an electrical interconnection, respectively.

The chip stack 4 may comprise chips 13 having bond pads 10 on it and maycomprise a flip-chip device 11 as an outer die of the chip stack 4. Theflip chip device 11 has contact elevations 12 which are arranged toprovide a contact with second contact structures 8 on the second surface6 of one of the redistribution substrate 3. The second contactstructures 8 of the respective redistribution substrate 3 are preferablyformed as contact pads which are in an arrangement corresponding to thearrangement of the contact elevations 12 of the flip-chip device 11. Thefurther chips 13 are stacked onto each other on the second surface 6 ofthe first redistribution substrate 2 such that their bond pads 10 remainuncovered and substantially are directed in the same direction as thesecond surface 6 of the first redistribution substrate 2. Bond wires 14are provided to connect the uncovered bond pads 10 of the respectivechips 13 with the respective second contact structures 8 on the secondsurface 6 of the first redistribution substrate 2.

Between the chips 13 an interposer 14 may be provided if more verticalspace for performing the bonding is necessary and which can alsofunction as an adhesive layer to mount the chips 13 together.

Besides the contact elevation 12 of the flip-chip device 11 also furthercontact structures 15 may be provided on the flip-chip device 11 whichare directed in the same direction as the bond pads 10 of the chips 13and which may be bonded by a bonding process with a respective secondcontact structure 8 on the second surface 6 of the first redistributionsubstrate 2.

The multichip device 1 therefore provides contact structures 18 on bothsurfaces represented by the first surfaces 5 of the first and secondredistribution substrates 2, 3 such that the I/O counts of the multichipdevice 1 may be increased and such that multichip devices 1 can bestacked together without the provision of any further measures such asan interposer, a flex interconnection and the like.

The space in between the first and the second redistribution substrates2, 3 may be filled with a molding material 19 to encapsulate the chipstack and to further improve the mechanical stability of the multichipdevice 1.

In FIG. 2, an assembly process of such a multichip device 1 is depicted.The assembly process provides to attach a chip stack onto a firstredistribution substrate 2 having a flip-chip device 11 as the mostupper chip having solder balls 12 directed in the same direction as thesecond surface 6 of the first redistribution substrate 2, i.e. towardsthe second redistribution substrate 3 to be mounted. The secondredistribution substrate 3 is attached onto the solder balls 12 of theflip-chip device 11 such that its second contact structures 8 (contactpads) come in contact with the solder balls 12 and which are connectedto each other by means of solder bridge or the like formed by a reflowprocess. The reflow of the solder balls provide an electrical connectionas well as a mechanical fixation of the second redistribution substrate3 on the chip stack 4.

As shown in FIG. 3, by the provision of contact elevations 18 in form ofsolder balls on the first surface of the redistribution substrate 2 andrespective contact pads 7 on the first surface of the secondredistribution substrate 3, the multichip device 1 can be provided insuch a manner that a plurality of multichip devices 1 can be stackedonto each other by arranging the contact elevations of the firstredistribution substrate of a first of the multichip devices to thecontact pads of the second redistribution substrate 3 of a second one ofthe multichip devices.

A large number of variations of the embodiments described above arepossible without leaving the scope of the present invention. With regardto this, it is further possible to provide in the chip stack 4 twoflip-chip devices 11 and both surfaces of the chip stack 4 such as toconnect each of the contact elevations 12 of the respective flip-chipdevice 11 with one of the redistribution substrates 2, 3. One or morefurther chips 13 can be arranged which are connected to one or both ofthe redistribution substrates 2, 3 by means of respective bond wires 8.In contrast to the arrangement of the contact elevations 18 on the firstsurface 5 of the first redistribution substrate 2 and the contact pads 7on the first surface 5 of the second redistribution substrate 3, it isfurther possible that both first surfaces 7 of the redistributionsubstrates 2, 3 are provided with contact elevations 18, and it is evenpossible that contact pads as well as contact elevations are provided onthe same surface 5 of the respective redistribution substrate 2, 3. Inthis case, the arrangement of contact elevations 18 and contact pads 7of the first redistribution substrate 2 should be adapted to arespective arrangement of contact pads 7 and contact elevations 18 of asurface to which the respective surface is to be electrically connectedsuch that a pair of a contact elevation and a contact pad are associatedto each other, respectively.

In FIGS. 4A and 4B, another embodiment of the present invention isdepicted wherein a plurality of chip stacks 41, 42 ,43 is arrangedbetween a first and a second redistribution substrates 2, 3. Thearrangement of a chip stack 4 as known from the embodiment of FIG. 1 maybe performed such, that a first one of the chip stacks 41 having one ormore chips 13 and a respective flip-chip device 11 arranged on top ofthe first chip stack 41 is attached on the first redistributionsubstrate 2 such that the contact elevations 12 on the respectiveflip-chip device 11 are directed in the same direction as the secondsurface 8 of the first redistribution substrate 2 and that a second oneof the chip stacks 42 is arranged on the second redistribution substrate3 such that the contact elevations 12 of the respective flip-chip device11 are directed in the same direction as the second surface 6 of thesecond redistribution substrate 3 such that the chip stacks 41, 42, 43each having one flip-chip device 11 being directed into differentdirections, respectively. In other words, while the first chip stack 41having a flip-chip device 11 which is directed (with its contactelevations/solder ball side) in the first direction, the second chipstack 42 is arranged top side down with respect to the first chip stack41.

In any case, as shown in FIG. 4B, the electrical connection between thefirst and the second redistribution substrates 2, 3 is performed by areflow process. Thereby, contact elevations of the respective flip-chipdevices 11 of the chip stacks 41, 42, 43 are brought into contact withrespective contact pads on the second surface 6 of the respective otherredistribution substrate 2, 3 and a common reflow process is performedsuch that the solder balls 12 of the flip-chip devices 11 melt and anelectrical connection between the solder balls and the contact pads isachieved. Such an arrangement allows a denser packaging of chip stacks41, 42, 43 as the stacked bare dies can be arranged close to each otherwithout being packaged before.

In FIG. 5, a further embodiment of the present invention is shownwherein multichip devices 1 are provided with contact elevations in formof solder balls 18 on each of the first surfaces 5 of bothredistribution substrates 2, 3. A plurality of such multichip devices 1is arranged between a first and a second printed circuit board 20, 21such that each of the plurality of multichip devices 1 is electricallycontacted by the first and the second printed circuit board 20, 21.Thereby, complex electronic systems can be assembled. At least one ofthe printed circuit boards has contact areas 22 on both sides, whichmight be interconnected by means of suitable redistribution structures.The contact elevations 18 on the first surfaces 5 of the redistributionsubstrates 2, 3 may be connected with the respective contact areas 22 bymeans of a conductive adhesive, solder paste and the like.

As shown in FIG. 6, it is also possible to provide a chip stack 4 on aPCB substrate 50, wherein the chips of the chip stack 4 further haveedge contacts 31 on at least one of its redistribution substrates 2, 3such that the multichip device 1 or a plurality of stacked multichipdevices 1 can be contacted via the edge contacts 31 on the edges of atleast the redistribution substrates 2, 3 e.g. by means of a flexibleinterconnection element 30, which provides an optical and/or electricalconnection. The interconnection between the flexible interconnectionelement 30 and the edge contacts can be provided by a conductiveadhesive solder paste, a mechanical connection, a clamping connectionand the like.

The chip stack can be further provided with intermediate substrates 51which carry at least one chip and which are stacked with furtherintermediate substrates 51 and/or further intermediates substrates 51including one or more and bare dies. The intermediate substrates 51 alsohave one or more edge contacts 31. The chips 13 stacked with theintermediate substrates 51 are banded to the respective adjacentintermediate substrate 51 via bond wires, for example. Between adjacentredistribution/intermediate substrates 2, 3, 51, solder bridges can beprovided to electrically interconnect the respective substrates 2, 3, 51directly.

While the foregoing is directed to embodiments of the present invention,other and further embodiments of the invention may be devised withoutdeparting from the basic scope thereof, and the scope thereof isdetermined by the claims that follow.

1. A multichip device, comprising: a first and a second redistributionsubstrate each having a respective first and second surface on oppositesides of the respective substrate and each having one or more of firstcontact structures on the respective first surface and one or more ofsecond contact structures on the respective second surface, wherein thefirst and the second contact structures are electrically interconnected;and a chip stack sandwiched between the first and second redistributionsubstrates and having a plurality of stacked chips, wherein a firstouter chip and a second outer chip are arranged to form opposing outersurfaces of the chip stack; wherein the first outer chip is electricallyconnected to the second contact structure of the first redistributionsubstrate and the second outer chip is electrically connected to thesecond contact structure of the second redistribution substrate.
 2. Themultichip device according to claim 1, wherein one or more contactelevations are formed on at least one of the opposing outer surfaces ofthe chip stack, the contact elevations being in electrical contact tothe respective second contact structures of at least one of the firstand the second redistribution substrates.
 3. The multichip deviceaccording to claim 2, wherein at least one of the outer chips of thechip stack is a Flipchip device having solder balls as the contactelevations.
 4. The multichip device according to claim 1, wherein atleast one of the chips of the chip stack has one or more third contactstructures on a surface portion uncovered by an adjacent one of thechips of the chip stack and wherein the third contact structures areelectrically connected with the second contact structures of at leastone of the first and the second redistribution substrates by one or morerespective bondwires.
 5. The multichip device according to claim 1,wherein the one or more contact elevations are disposed on one of theouter surfaces of the chip stack defined by the first outer chip, thecontact elevations being in electrical contact to the respective secondcontact structures of the first redistribution substrates, and whereinat least one of the chips of the chip stack has one or more thirdcontact structures on a surface portion uncovered by an adjacent one ofthe chips of the chip stack wherein the third contact structures areelectrically connected with the second contact structures of the secondredistribution substrates by one or more bondwires.
 6. The multichipdevice according to claim 1, further comprising an interposer disposedbetween at least two of the plurality of chips of the chip stack.
 7. Themultichip device according to claim 1, wherein the second surfaces ofthe first and the second redistribution substrates are in opposingfacing relation to each other, wherein the one or more of the firstcontact structures comprise one or more outer contact elevations.
 8. Themultichip device according to claim 1, wherein the first and the secondredistribution substrates each comprise a redistribution layer toprovide an interconnection between the respective first and secondcontact structures.
 9. A multichip device, comprising: a first and asecond redistribution substrate each having a respective first andsecond surface on opposite sides of the respective substrate and eachhaving one or more of first contact structures on the respective firstsurface and one or more of second contact structures on the respectivesecond surface, wherein the first and the second contact structures areelectrically interconnected; and a chip stack sandwiched between thefirst and second redistribution substrates and having a plurality ofstacked chips wherein a first outer chip and a second outer chip arearranged to form opposing outer surfaces of the chip stack, wherein thesecond surfaces of the first and the second redistribution substratesare in opposing facing relation; wherein the first outer chip iselectrically connected to the second contact structure of the firstredistribution substrate and the second outer chip is electricallyconnected to the second contact structure of the second redistributionsubstrate; and wherein the one or more first contact structures on thefirst surface of one of the first and second redistribution substratescomprise one or more outer contact elevations, and wherein the one ormore first contact structures on the first surface of the respectiveother of the first and second redistribution substrates are contactpads.
 10. The multichip device according to claim 9, wherein at leastone of the outer chips of the chip stack is a Flipchip device havingsolder balls as the contact elevations.
 11. The multichip deviceaccording to claim 9, wherein the first and the second redistributionsubstrates each comprise a redistribution layer disposed between therespective first and second contact structures and configured to providean electrical interconnection between the respective first and secondcontact structures.
 12. A multichip device, comprising: a first and asecond redistribution substrate each having a respective first andsecond surface on opposite sides of the respective substrate and eachhaving one or more of first contact structures on the respective firstsurface and one or more of second contact structures on the respectivesecond surface, wherein the first and the second contact structures areelectrically interconnected; and a chip stack sandwiched between thefirst and second redistribution substrates, wherein the second surfacesof the first and the second redistribution substrates are in opposingfacing relation, wherein the chip stack comprises a plurality of stackedchips, wherein a first outer chip and a second outer chip are arrangedto form opposing outer surfaces of the chip stack; wherein the firstouter chip is electrically connected to the second contact structure ofthe first redistribution substrate and the second outer chip iselectrically connected to the second contact structure of the secondredistribution substrate; and wherein the one or more first contactstructures on at least one of the first surfaces of the first and secondredistribution substrates at least partially comprise one or more outercontact elevations and the respective other contact structures areformed as contact pads.
 13. The multichip device according to claim 12,wherein at least one of the outer chips of the chip stack is a Flipchipdevice having solder balls as the contact elevations.
 14. The multichipdevice according to claim 12, wherein the first and the secondredistribution substrates each comprise a redistribution layer disposedbetween the respective first and second contact structures andconfigured to provide an electrical interconnection between therespective first and second contact structures.
 15. A multichip device,comprising: a first and a second redistribution substrate each having arespective first and second surface on opposite sides of the respectivesubstrate and each having one or more of first contact structures on therespective first surface and one or more of second contact structures onthe respective second surface, wherein the first and the second contactstructures are electrically interconnected; and a chip stack sandwichedbetween the first and second redistribution substrates and having aplurality of chips wherein a first outer chip and a second outer chipare arranged to form opposing outer surfaces of the chip stack; whereinthe first outer chip is attached to the first redistribution substrateand the second outer chip is attached to the second redistributionsubstrate; wherein one of the first and the second outer chips has onits respective surface forming the outer surface of the chip stack oneor more contact elevations which are in electrical contact with the oneor more second contact structures of the first redistribution substrate;and wherein one of the chips of the chip stack has one or more thirdcontact structures on a surface portion uncovered by an adjacent one ofthe chips of the chip stack, wherein the third contact structures areelectrically contacted with the second contact structures of the secondredistribution substrate by a bondwire.
 16. A multichip device,comprising: a first and a second redistribution substrate each having arespective first and second surface on opposite sides of the respectivesubstrate and each having one or more of first contact structures on therespective first surface and one or more of second contact structures onthe respective second surface, wherein the first and the second contactstructures are electrically interconnected; and a plurality of chipstacks each sandwiched between the first and second redistributionsubstrates and each having a plurality of chips including a first outerchip and a second outer chip being arranged to form opposing outersurfaces of the respective chip stack; wherein a first one of theplurality of the chip stacks is arranged so that the respective firstouter chip is attached to the first redistribution substrate, andwherein the first outer chip has on its surface forming an outer surfaceof the chip stack one or more contact elevations which are in electricalcontact to the respective second contact structures of the firstredistribution substrate; and wherein a second one of the plurality ofthe chip stacks is arranged so that the respective first outer chip isattached to the second redistribution substrate wherein the first outerchip has on its surface forming an outer surface of the chip stack oneor more contact elevations which are in electrical contact to therespective second contact structures of the second redistributionsubstrate.
 17. The multichip device according to claim 9, wherein thesecond outer chip of the first chip stack has one or more third contactstructures which are connected to the second contact structures of thesecond redistribution substrate by one or more first bondwires, andwherein the second outer chip of the second chip stack has third contactstructures which are connected to the respective second contactstructures of the first redistribution substrate by one or more secondbondwires.
 18. An electronic device, comprising: a first and a secondprinted circuit board; and a multichip device sandwiched between thefirst and the second printed circuit boards and electrically connectedto interconnection structures of at least one of the first and thesecond printed circuit board; wherein the multichip device comprises: afirst and a second redistribution substrate each having a respectivefirst and second surface on opposite sides of the respective substrateand each having one or more of first contact structures on therespective first surface and one or more of second contact structures onthe respective second surface, wherein the first and the second contactstructures are electrically interconnected; and a chip stack sandwichedbetween the first and second redistribution substrates and having aplurality of stacked chips, wherein a first outer chip and a secondouter chip are arranged to form opposing outer surfaces of the chipstack; wherein the first outer chip is electrically connected to thesecond contact structure of the first redistribution substrate and thesecond outer chip is electrically connected to the second contactstructure of the second redistribution substrate.
 19. A package stack,comprising: a plurality of stacked multichip devices, each multichipdevice comprising: a first and a second redistribution substrate eachhaving a respective first and second surface on opposite sides of therespective substrate and each having one or more of first contactstructures on the respective first surface and one or more of secondcontact structures on the respective second surface, wherein the firstand the second contact structures are electrically interconnected; and achip stack sandwiched between the first and second redistributionsubstrates and having a plurality of stacked chips, wherein a firstouter chip and a second outer chip are arranged to form opposing outersurfaces of the chip stack; wherein the first outer chip is electricallyconnected to the second contact structure of the first redistributionsubstrate and the second outer chip is electrically connected to thesecond contact structure of the second redistribution substrate; andwherein the first contact structures of the first redistributionsubstrate of a first one of the multichip devices are brought intocontact with the second contact structures of the second redistributionsubstrate of a second one of the multichip devices.